-USB 2.0 USB IF Hi-Speed certified (TID # 40460272)
-Single-chip integrated USB 2.0 transceiver, smart SIE, and
enhanced 8051 microprocessor
-Fit-, form-, and function-compatible with the FX2
---Pin-compatible0
---Object-code-compatible
---Functionally compatible (FX2LP is a superset)
-Ultra-low power: ICC no more than 85 mA in any mode
---Ideal for bus- and battery-powered applications
-Software: 8051 code runs from:
---Internal RAM, which is downloaded through USB
---Internal RAM, which is loaded from EEPROM
---External memory device (128-pin package)
-16 KB of on-chip code/data RAM
-Four programmable BULK, INTERRUPT, and
ISOCHRONOUS endpoints
---Buffering options: Double, triple, and quad
-Additional programmable (BULK/INTERRUPT) 64-byte
endpoint
-8-bit or 16-bit external data interface
-Smart media standard ECC generation
-GPIF™ (general programmable interface)
---Enables direct connection to most parallel interfaces
---Programmable waveform descriptors and configuration
registers to define waveforms
---Supports multiple ready (RDY) inputs and control (CTL)
outputs
-Integrated, industry-standard, enhanced 8051
---48-MHz, 24-MHz, or 12-MHz CPU operation
---Four clocks per instruction cycle
---Two USARTs
---Three counter/timers
---Expanded interrupt system
---Two data pointers
-3.3-V operation with 5-V tolerant inputs
-Vectored USB interrupts and GPIF/FIFO interrupts
-Separate data buffers for the setup and data portions of a
CONTROL transfer
-Integrated I2C controller; runs at 100 or 400 kHz[1]
-Four integrated FIFOs
---Integrated glue logic and FIFOs lower system cost
---Automatic conversion to and from 16-bit buses
---Master or slave operation
---Uses external clock or asynchronous strobes
---Easy interface to ASIC and DSP ICs